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J Electr Electron Mater : Journal of Electrical and Electronic Materials

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"Copper pillar bump"

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"Copper pillar bump"

Studies on Copper Pillar Bump with Trapezoidal Cross Section on the Top Surface for Reliability Improvement
Il Hwan Cho
J Korean Inst Electr Electron Mater Eng 2012;25(7):496-499.   Published online July 1, 2012
DOI: https://doi.org/10.4313/JKEM.2012.25.7.496
Modified structure of copper pillar bump which has trapezoidal cross section on the top region is suggested with simulation results and concept of fabrication process. Due to the large surface area of joint region between bump and solder in suggested structure, electro-migration effect can be reduced. Reduction of electro-migration is related with current density and joule heating in bump and investigated with finite element methods with variation of dimensional parameters. Mechanical characteristics are also investigated with comparing modified copper pillar bump and conventional copper pillar bump.
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Regular Paper : Method of Solving Oxidation Problem in Copper Pillar Bump Packaging Technology of High Density IC
One Chul Jung, Sang Jeen Hong, Dae Wha Soh, Jae Ryong Hwang, Il Hwan Cho
J Korean Inst Electr Electron Mater Eng 2010;23(12):919-923.   Published online December 1, 2010
DOI: https://doi.org/10.4313/JKEM.2010.23.12.919
Copper pillar tin bump (CPTB) was developed for high density chip interconnect technology. Copper pillar tin bumps that have 100μm pitch were introduced with fabrication process using a KM-1250 dry film photoresist (DFR), copper electroplating method and Sn electro-less plating method. Mechanical shear strength measurements were introduced to characterize the bonding process as a function of thermo-compression. Shear strength has maximum value with 330℃ and 500 N thermo-compression process. Through the simulation work, it was proved that when the copper pillar tin bump decreased in its size, it was largely affected by the copper oxidation.
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