Understanding the structure-property relationship in functional materials is crucial as microstructural features such as nano-precipitates, phase boundary, grain boundary segregation, and grain boundary phases play a key role in their functional properties. Atom probe tomography (APT) is an advanced analytical technique that allows for the three-dimensional (3D) mapping of atomic distributions and the precise determination of local chemical compositions in materials. Moreover, it offers sub-nanometer spatial resolution and chemical sensitivity at the tens of parts per million (ppm) level. Owing to its unique capabilities, this technique has been employed to uncover the 3D elemental distributions in a wide range of materials, including alloys, semiconductors, nanomaterials, and even biomaterials. In this paper, various kinds of examples are introduced for elucidating structure-property relationships on functional materials by utilizing the atom probe tomography.
Grain boundaries play a major role in determining device performance, particularly of polysilicon-based photodetectors. Through the post-annealing of as-deposited polysilicon and then, the analysis of electric behavior for a metal-polysilicon-metal (MSM) photodetector, we were able to identify the influence of grain boundaries. A modified model of polysilicon grain boundaries in the MSM structure is presented, which uses a crystalline-interfacial layer-SiOx layer- interfacial layer-crystalline system that is similar to the Si-SiO2 system in MOS device. Hydrogen passivation was achieved through a hydrogen ion implantation process and was used to passivate the defects at both interfacial layers. The thin SiOx layer at the grain boundary can enhance the photosensitivity of an MSM photodetector by decreasing the dark current and increasing the light absorption.
In this study, we investigated the crystal defects and grain boundary properties in a ZZCCC (ZnO-Zn2BiVO6-Co3O4-Cr2O3-CaCO3) varistor, with the liquid-phase sintering aid Zn2BiVO6 developed by our laboratory. The ZZCCC varistor sintered at 1,200℃ exhibited excellent nonlinear current-voltage characteristics (α=63), with oxygen vacancy (V0·; 0.35 eV) as a main defect, and an apparent activation energy of 1.1 eV with an electrically single grain boundary. Therefore, among the various additives to improve the electrical properties of ZnO varistors, if Zn2BiVO6 is used as a liquid phase sintering aid, it will be ideal to use Co for the oxygen vacancy and Ca for the electrically single grain boundary. This will allow the good properties of ZnO varistors to be maintained up to high sintering temperatures.
Liquid phases in ZnO varistors cause more complex phase development and microstructure, which makes the control of electrical properties and reliability more difficult. Therefore, we have investigated 2 mol% CaCO3 doped ZnO-Co3O4-Cr2O3-La2O3 (ZCCLCa) bulk ceramics as one of the compositions without liquid phase sintering additive. The results were as follows: when CaCO3 is added to ZCCLCa (644 Ωcm) acting as a simple ohmic resistor, CaO does not form a secondary phase with ZnO but is mostly distributed in the grain boundary and has excellent varistor characteristics (high nonlinear coefficient α=78, low leakage current of 0.06 μA/㎠, and high insulation resistance of 1×1011 Ωcm). The main defects Zni·· (AS: 0.16 eV, IS & MS: 0.20 eV) and V˙o (AS: 0.29 eV, IS & MS: 0.37 eV) were found, and the grain boundaries had 1.1 eV with electrically single grain boundary. The resistance of each defect and grain boundary decreases exponentially with increasing the measurement temperature. However, the capacitance (0.2 nF) of the grain boundary was ~1/10 lower than that of the two defects (~3.8 nF, ~2.2 nF) and showed a tendency to decrease as the measurement temperature increased. Therefore, ZCCLCa varistors have high sintering temperature of 1,200℃ due to lack of liquid phase additives, but excellent varistor characteristics are exhibited, which means ZCCLCa is a good candidate for realizing chip type or disc type commercial varistor products with excellent performance.
In this study, we have investigated the effects of Mn and Co co-doping on defects, J-E curves and grain boundary characteristics of ZnO-Bi2O3 (ZB) varistor. Admittance spectra and dielectric functions show two bulk defects of Zn ·· (0.17∼0.18 eV) and V· (0.30∼0.33 eV). From J-E characteristics the nonlinear coefficient (α) and resistivity (ρgb) of pre-breakdown region decreased as 30 to 24 and 5.1 to 0.08 GΩcm with sintering temperature, respectively. The double Schottky barrier of grain boundaries in ZB(MCo) (ZnO-Bi2O3-Mn3O4-Co3O4) could be electrochemically single type. However, its thermal stability was slightly disturbed by ambient oxygen because the apparent activation energy of grain boundaries was changed from 0.64 eV at lower temperature to 1.06 eV at higher temperature. It was revealed that a co-doping of Mn and Co in ZB reduced the heterogeneity of the barrier in grain boundaries and stabilized the barrier against an ambient temperature (α-factor= 0.136).
In this study, we investigated the effects of Mn dopant (0.1∼3.0 at% Mn3O4 sintered at 100 0℃ for 1 h in air) on the bulk trap (i.e. defect) and grain boundary properties of ZnO, ZM(0.1∼3.0) using admittance spectroscopy (AS), and impedance-modulus spectroscopy (IS & MS). As a result, three kinds of defect were found below the conduction band edge of ZnO as 0.09∼0.14 eV (attractive coulombic center), 0.22∼25 eV (Zn¨(i)), and 0.32∼0.33 eV (V`o). The oxygen vacancy increased with Mn doping. In ZM, an electrically single grain boundary as double Schottky barrier was formed with 0.82∼1.0 eV of activation energies by IS & MS. We also find out that the barriers of grain boundary of Mn-doped ZnO (α-factor=0.13) were more stabilized and homogenized with temperature compared to pure ZnO.
In this paper, we investigated an anomalous hump phenomenon under the positive bias stress in p-type LTPS TFTs. The devices with inferior electrical performance also show larger hump phenomenon. which can be explained by the sub-channel induced from trapped electrons under thinner gate oxide region. We can confirm that the devices with larger hump have larger interface trap density (Dit) and grain boundary trap density (Ntrap) extracted by low-high frequency capacitance method and Levinson-Proano method, respectively. From the C-V with I-V transfer characteristics, the trapped electrons causing hump seem to be generated particularly from the S/D and gate overlapped region. Based on these analysis, the major cause of an anomalous hump phenomenon under the positive bias stress in p-type poly-Si TFTs is explained by the GIDL occurring in the S/D and gate overlapped region and the traps existing in the channel edge region where the gate oxide becomes thinner, which can be inferred by the fact that the magnitude of the hump is dependent on the average trap densities.
Poly Si TFTs (poly silicon thin film transistors) with p channel those are annealed HT (high t emperature) with gate poly crystalline silicon and LT (low temperature) with metal gate electrode were fabricated on quartz substrate using the analyzed data and compared according to the activated grade silicon thin films and the size of device channel. The electrical characteristics of HT poly-Si TFTs increased those are the on current, electron mobility and decrease threshold voltage by the quality of particles of active thin films annealed at high temperature. But the on/off current ratio reduced by increase of the off current depend on the hot carrier applied to high gate voltage. Even though the size of the particles annealed at low temperature are bigger than HT poly-Si TFTs due to defect in the activated grade poly crystal silicon and the grain boundary, the characteristics of LT poly-Si TFTs were investigated deterioration phenomena those are decrease the electric off current, electron mobility and increase threshold voltage. The results of transconductance show that slope depend on the quality of particles and the amplitude depend on the size of the active silicon particles.