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J Electr Electron Mater : Journal of Electrical and Electronic Materials

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"KOH etch"

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"KOH etch"

Modeling of Silicon Etch in KOH for MEMS Based Energy Harvester Fabrication
Chul Hong Min, Gyeong Woo Gang, Tae Seon Kim
J Electr Electron Mater 2012;25(3):176-181.   Published online March 1, 2012
Due to the high etch rate and low fabrication cost, the wet etching of silicon using KOH etchant is widely used in MEMS fabrication area. However, anisotropic etch characteristic obstruct intuitional mask design and compensation structures are required for mask design level. Therefore, the accurate modeling for various types of silicon surface is essential for fabrication of three-dimensional MEMS structure. In this paper, we modeled KOH etch profile for MEMS based energy harvester using fuzzy logic. Modeling results are compared with experimental results and it is applied to design of compensation structure for MEMS based energy harvester. Through Fuzzy inference approaches, developed model showed good agreement with the experimental results with limited etch rate information.
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Characterization of Dislocations in 4H-SiC Epitaxy Using Molten-KOH Etching
Yun Ji Shin, Won Jeong Kim, Jeong Hyun Moon, Wook Bahng
J Electr Electron Mater 2011;24(10):779-783.   Published online October 1, 2011
The morphology of etch pits in commercial 4H-SiC epi-wafer were investigated by molten-KOH etching. The etching process was optimized in 525~570℃ at 2~10 min and the novel type of etch pits was revealed. This type of etch pits have been considered as TED (threading edge dislocation) II, its origin and nature, however, are not reported yet. In this work, the morphology and evolution of etch pits during epitaxial growth were analyzed and the different behavior between TED and TEDII was discussed.
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