This paper presents a Si-NWFET-based LC-VCO design that includes an SCA, a P-type Si-NWFET varactor, a 1.2 nH LC tank, and a bias network to linearize the varactor’s C-V characteristics, enabling a wide oscillation frequency tuning range. The circuit achieves a 24 GHz oscillation frequency with a low power consumption of 16.8 μW at a control voltage (V_ctrl) of 0.7 V. Phase noise simulations indicate an excellent -109.62 dBc/Hz at a 1 MHz offset, confirming its applicability for RFIC systems. Additionally, the proposed LC-VCO demonstrates stable performance in five major corner process analyses, ensuring robustness under extreme conditions. These results validate the durability of the design and highlight the potential of Si-NWFETbased LC-VCOs as a viable, low-power, highly integrated solution for RFIC applications. The findings underscore the suitability of Si-NWFET technology as a promising alternative to current FinFET and CMOS processes in advanced circuit design.

This paper presents a design and fabrication of 0.5 V two stage operational amplifier. The proposed operational amplifier utilizes body-driven differential input stage and self-cascode current mirror structure. Cadence Virtuoso is used for layout and the layout data is verified by LVS through Mentor Calibre. The proposed two stage operational amplifier is fabricated using 0.13 ㎛ CMOS process and operation at 0.5 V is confirmed. Measured low frequency small signal gain of operational amplifier is 50 ㏈, power consumption is 29 ㎼ and chip area is 75 ㎛ × 90 ㎛.