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"PiN diode"

Optimization of the P+ Region in SiC-Based MPS Diodes: Enhancing BFOM and Alleviating Snap-Back Phenomenon
Seung-hyun Park, Tae-hee Lee, Se-rim Park, Ju-eun Yun, Geon-hee Lee, Ji-hwan Jeon, Jong-min Oh, Weon Ho Shin, Sang-mo Koo
J Electr Electron Mater 2024;37(6):675-679.   Published online November 1, 2024
DOI: https://doi.org/10.4313/JKEM.2024.37.6.15
Department of Electric Materials Engineering, Kwangwoon University, Seoul 01897, Korea (Received June 13, 2024; Revised July 8, 2024; Accepted July 10, 2024) Abstract: Wide bandgap (WBG) devices, especially SiC, are gaining traction as materials for high-power EV conversion devices due to their superior efficiency and switching capabilities compared to Si-based power devices. SiC allows for high power, high temperature, and high frequency applications because of its outstanding thermal conductivity, saturation velocity, and dielectric breakdown field. SiC-based MPS diodes combine the advantages of SiC-based SBDs and PiN diodes, allowing high-frequency switching operation with low leakage currents under high voltage conditions. However, MPS diodes exhibit snapback phenomena influenced by the P+ region’s size, necessitating optimization. A TCAD simulation studied the impact of the P+ region’s depth and width on MPS diode performance. Increasing the P+ width raised the On-specific resistance (Ron,sp) and lowered the maximum voltage during snapback (Vsnap). Increasing the depth decreased both Breakdown voltage (BV) and Vsnap. A trade-off between the semiconductor performance index BFOM and Vsnap was identified, leading to optimized dimensions. The optimized MPS diode shows a low Vsnap of about 3.89 V and a high BFOM of 1.72 GW·㎠, highlighting its potential as a next-generation high-performance power conversion device.
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