This study focuses on a pillar in which is implanted a P-type maneuver under a P base. This structure is called a super junction structure. By inserting the pillar, the electric field concentrated on the P base is shared by the pillar, so the columns can be dispersed while maintaining a high breakdown voltage. Ten pillars were generated during the multi epitaxial process. The interval between pillars is varied to optimize the electric field to be concentrated on the pillar at a threshold voltage of 6 V, a yield voltage of 4,500 V, and an on-state voltage drop of 3.8 V. The density of the filler gradually decreased when the interval was extended by implanting a filler with the same density. The results confirmed that the size of the depletion layer between the filler and the N-epitaxy layer was reduced, and the current flowing along the N-epitaxy layer was increased. As the interval between the fillers decreased, the cost of the epitaxial process also decreased. However, it is possible to confirm the trade-off relationship that deteriorated the electrical characteristics and efficiency.

A power device is a component used as a switch or rectifier in power electronics to control high voltages. Consequently, power devices are used to improve the efficiency of electric-vehicle (EV) chargers, new energy generators, welders, and switched-mode power supplies (SMPS). Power device designs, which require high voltage, high efficiency, and high reliability, are typically based on MOSFET (metal-oxide-semiconductor field-effect transistor) and IGBT (insulated-gate bipolar transistor) structures. As a unipolar device, a MOSFET has the advantage of relatively fast switching and low tail current at turn-off compared to IGBT-based devices, which are built on bipolar structures. A superjunction structure adds a p-base region to allow a higher yield voltage due to lower RDS (on) and field dispersion than previous p-base components, significantly reducing the total gate charge. To verify the basic characteristics of the superjunction, we worked with a planar type MOSFET and Synopsys’ process simulation T-CAD tool. A basic structure of the superjunction MOSFET was produced and its changing electrical characteristics, tested under a number of environmental variables, were analyzed.

We investigated the structure of an ultra-thin insulating board with low thermal conductivity along z-axis, which was based on the idea of void layers created during the glass infiltration process for the zero-shrinkage low-temperature co-fired ceramic (LTCC) technology. An alumina and four glass powders were chosen and prepared as green sheets by the tape casting method. After comparison of the four glass powders, bismuth glass was selected for the experiment. Since there is no notable reactivity between alumina and bismuth glass, alumina was selected as the supporting additive in glass layers. With 2.5 vol% of alumina powder, glass green sheets were prepared and stacked alternately with alumina green sheet to form the ‘alumina/glass (including alumina additive)/alumina’ structure. The stacked green sheets were sintered into an insulating substrate. Scanning electron microscopy revealed that the additive alumina formed supporting bridges in void layers. The depth and number of the stacking layers were varied to examine the insulating property. The lowest thermal conductivity obtained was 0.23 W/mK with a 500-㎛-thick substrate.

In this paper, we analyzed the structural design and electrical characteristics of a 3.3 kV super junction FS IGBT as a next generation power device. The device parameters were extracted by design and process simulation. To obtain optimal breakdown voltage, we researched the breakdown characteristics. Initially, we confirmed that the breakdown voltage decreased as trench depth increased. We analyzed the breakdown voltage according to p pillar dose. As a result of the experiment, we confirmed that the breakdown voltage increased as p pillar dose increased. To obtain more than 3.3 kV, the p pillar dose was 5×10¹³ cm^-2, and the epi layer resistance was 140 Ω. We extracted design and process parameters considering the on state voltage drop.

This paper was analyzed electrical characteristics of super junction power MOSFETconsidering to charge imbalance. We extracted optimal design and process parameter at -15% of chargeimbalance. Considering extracted design and process parameters, we fabricated super junction MOSFETand analyzed electrical characteristics. We obtained 600∼650 V breakdown voltage, 224∼240 mΩ onresistance. This paper was showed superior on resistance of super junction MOSFET. We can use forautomobile industry.

This paper was showed latch up characteristics of super junction power MOSFET by parasiticthyristor according to trench etch angle. As a result of research, if trench etch angle of super junction MOSFET is larger, we obtained large latch up voltage. When trench etch angle was 90°, latch up voltage was more 50 V. and we got 700 V breakdown voltage. But we analyzed on resistance. if trench etch angle of super junction MOSFET is larger, we obtained high on resistance. Therefore, we need optimal point by simulation and experiment for solution of trade off.

In this paper, we analyze electrical characteristics of n/p-pillar layer according to trench anglewhich is the most important characteristics of SJ MOSFET and core process. Because research target is600 V class SJ MOSFET, so conclusively trench angle deduced 89.5 degree to implement the breakdownvoltage 750 V with 30% margin rate. we found that on resistance is 22 mohm·cm2 and threshold voltageis 3.5 V. Moreover, depletion layer of electric field distribution also uniformly distributes.

This paper was developed and described core-process to implement low on resistance whichwas the most important characteristics of SJ (super junction) MOSFET. Firstly, using process-simulation,SJ MOSFET optimal structure was set and developed its process flow chart by repeated simulation. Following process flow, gate level process was performed. And source and drain level process wassimilar to genral planar MOSFET, so the process was the same as the general planar MOSFET. Andthen to develop deep trench process which was main process of the whole process, after finishing photomask process, we developed deep trench process. We expected that developed process was necessary todevelop SJ MOSFET for automobile semiconductor.

The optimal structure of 1-3 piezocomposites has been determined by controlling polymer properties, ceramic volume fraction, thickness of composite and aspect ratio of the composite to maximize the TVR (transmitting voltage response), RVS (receiving voltage sensitivity) and FBW (fractional bandwidth) of underwater acoustic transducers. Influence of the design variables on the transducer performance was analyzed with equivalent circuits and the finite element method. When the piezocomposite is vibrating in a pure thickness mode, inter-pillar resonant modes are likely to occur between lattice-structured piezoceramic pillars and polymer matrix, which significantly deteriorate the performance of the piezocomposite. In this work, a new method to design the structure of the 1∼3 type piezocomposite was proposed to maximize the TVR, RVS and FBW while preventing the occurrence of the inter-pillar modes. Genetic algorithm was used in the optimal design.

Release competition and development of eco-friendly vehicles have been conducted violently also automaker, it will be a high growth industry of the charger and battery, which is the driving source of the motor of an electric vehicle. Reduces the on-resistance power elements DC - DC converter for battery charger for electric vehicles, must minimize switching losses. Should have a low on-resistance power than existing products. Compare the Super Junction MOSFET and Planar MOSFET, As a result, super junction MOSFET improve on about 87.4% on-state voltage drop performance than planar MOSFET.

With polymer properties and ceramic volume fraction as design variables, the optimal structure of 1-3 piezocomposites has been determined to maximize the thickness mode electromechanical coupling factor. When the piezocomposite vibrates in a thickeness mode, inter-pillar resonant modes are likely to occur between lattice-structured piezoceramic pillars and polymer matrix, which significantly deteriorates the performance of the piezocomposite. In this work, work, a new method to design the structure of the 1-3 type piezocomposite is proposed to maximize the thickness mode electromechanical coupling factor while preventing the occurrence of the inter- pillar modes. Genetic algorithm was used for the optimal design, and the finite element analysis method was used for the analysis of the inter-pillar mode.

Modified structure of copper pillar bump which has trapezoidal cross section on the top region is suggested with simulation results and concept of fabrication process. Due to the large surface area of joint region between bump and solder in suggested structure, electro-migration effect can be reduced. Reduction of electro-migration is related with current density and joule heating in bump and investigated with finite element methods with variation of dimensional parameters. Mechanical characteristics are also investigated with comparing modified copper pillar bump and conventional copper pillar bump.

In this paper, we have proposed piezoelectric energy harvester employing the pillar structure with the diameter size of 500 um. So we have selected the Su-8 photo-resist and modified lithography process to manufacture the pillar structure with height above the 500 μm. Simultaneously, we tried to make a comparative study to use ceramic bulk - polymer structure In this paper, we will report the process and properties of micro pillar structure based on the PMN-PZT (Pb(Mg1/3Nb2/3)O3-PbZrTiO3) materials. Finally, We will propose a method for generating electrical energy with a piezoelectric element using vibration, an energy source can be obtained from the "clean" energy.

Copper pillar tin bump (CPTB) was developed for high density chip interconnect technology. Copper pillar tin bumps that have 100μm pitch were introduced with fabrication process using a KM-1250 dry film photoresist (DFR), copper electroplating method and Sn electro-less plating method. Mechanical shear strength measurements were introduced to characterize the bonding process as a function of thermo-compression. Shear strength has maximum value with 330℃ and 500 N thermo-compression process. Through the simulation work, it was proved that when the copper pillar tin bump decreased in its size, it was largely affected by the copper oxidation.

Abstract: In this study, the piezoelectric energy harvester was investigated employing the pillar structure with the diameter size of 50～500 um. Usually, the aspect ratio between the height and diameter was related with the piezoelectric performance. High aspect ratio was showed the low electric noise and high piezoelectric properties than low aspect ratio. Therefore, we have selected the Su-8 photo-resist and modified lithography process to manufacture the pillar structure with height above the 250 μm. In this presentation, we will report the process and properties of micro pillar structure based on the PMN-PZT (Pb(Mg(1/3)Nb(2/3))O(3)-PbZrTiO(3)) materials.