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"Vth"

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"Vth"

Study on Electric Characteristics of IGBT Having P Region Under Trench Gate
Byoung Sub Ann, Jinkeoung Yuek, Ey Goo Kang
J Electr Electron Mater 2019;32(5):361-365.   Published online September 1, 2019
Although there is no strict definition of a power semiconductor device, a general description is a semiconductor that has capability to control more than 1 W of electricity. Integrated gate bipolar transistors (IGBTs), which are power semiconductors, are widely used in voltage ranges above 300 V and are especially popular in high-efficiency, high-speed power systems. In this paper, the size of the gate was adjusted to test the variation in the yield voltage characteristics by measuring the electric field concentration under the trench gate. After the experiment Synopsys’ TCAD was used to analyze the efficiency of threshold voltage, on-state voltage drop, and breakdown voltage by measuring the P- region and its size under the gate.
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Analog Performance Analysis of Self-cascode Structure with Native-Vth MOSFETs
Dae Hwan Lee, Ki Ju Baek, Ji Hoon Ha, Kee Yeol Na, Yeong Seuk Kim
J Electr Electron Mater 2013;26(8):575-581.   Published online August 1, 2013
The self-cascode (SC) structure has low output voltage swing and high output resistance. In order to implement a simple and better SC structure, the native-Vth MOSFETs which has low threshold voltage (Vth) is applied. The proposed SC structure is designed using a qualified industry standard 0.18-㎛ CMOS technology. Measurement results show that the proposed SC structure has higher transconductance as well as output resistance than single MOSFET. In addition, analog building blocks (e.g. current mirror, basic amplifier circuits) with the proposed SC structure are investigated using by Cadence Spectre simulator. Simulation results show improved electrical performances.
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Characterization and Comparison of Doping Concentration in Field Ring Area for Commercial Vertical MOSFET on 8” Si Wafer
Young Soo Kwon, Gwon Je Kim, Ye Hwan Kang
J Electr Electron Mater 2013;26(4):271-274.   Published online April 1, 2013
Power Metal Oxide Semiconductor Field Effect Transistor`s (MOSFETs) are well known for superior switching speed, and they require very little gate drive power because of the insulated gate. In these respects, power MOSFETs approach the characteristics of an “ideal switch”. The main drawback is on-resistance RDS(on) and its strong positive temperature coefficient. While this process has been driven by market place competition with operating parameters determined by products, manufacturing technology innovations that have not necessarily followed such a consistent path have enabled it. This treatise briefly examines metal oxide semiconductor (MOS) device characteristics and elucidates important future issues which semiconductor technologists face as they attempt to continue the rate of progress to the identified terminus of the technology shrink path in about 2020. We could find at the electrical property as variation p base dose. Ultimately, its ON state voltage drop was enhanced also shrink chip size. To obtain an optimized parameter and design, we have simulated over 500 V Field ring using 8 Field rings. Field ring width was 3 ㎛ and P base dose was 1e15 ㎠. Also the numerical multiple 2.52 ㎠ was obtained which indicates the doping limit of the original device. We have simulated diffusion condition was split from 1,150℃ to 1,200℃. And then 1,150℃ diffusion time was best condition for break down voltage.
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A Study About Design and Characteristic Improvement According to P-base Concentration Charge of 500 V Planar Power MOSFET
Young Soo Kwon, Gwon Je Kim, Ye Hwan Kang
J Electr Electron Mater 2013;26(4):284-288.   Published online April 1, 2013
Power MOSFETs(Metal Oxide Semiconductor Field Effect Transistor) operate as energy control semiconductor switches. In order to reduce energy loss of the device during switch-on state, it is essential to increase its conductance. We have experimental results and explanations on the doping profile dependence of the electrical behavior of the vertical MOSFET. The device is fabricated as 8.25 ㎛ cell pitch and 4.25 ㎛ gate width. The performances of device with various p base doping concentration are compared at Vth from 1.77 V to 4.13 V. Also the effect of the cell structure on the on-resistance and breakdown voltage of the device are analyzed. The simulation results suggest that the device optimized for various applications can be further optimized at power device.
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