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Through-Silicon Via를 활용한 3D NAND Flash Memory의 전열 어닐링 발열 균일성 개선

손영서, 이광선, 김유진, 박준영

Electro-Thermal Annealing of 3D NAND Flash Memory Using Through-Silicon Via for Improved Heat Distribution

Young-seo Son, Khwang-sun Lee, Yu-jin Kim, Jun-young Park
J Electr Electron Mater 2023;36(1):23-28.
Published online: January 1, 2023
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This paper demonstrates a novel NAND flash memory structure and annealing configuration including through-silicon via (TSV) inside the silicon substrate to improve annealing efficiency using an electro-thermal annealing (ETA) technique. Compared with the conventional ETA which utilizes WL-to-WL current flow, the proposed annealing method has a higher annealing temperature as well as more uniform heat distribution, because of thermal isolation on the silicon substrate. In addition, it was found that the annealing temperature is related to the electrical and thermal conductivity of the TSV materials. As a result, it is possible to improve the reliability of NAND flash memory. All the results are discussed based on 3-dimensional (3-D) simulations with the aid of the COMSOL simulator.

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Electro-Thermal Annealing of 3D NAND Flash Memory Using Through-Silicon Via for Improved Heat Distribution
J Electr Electron Mater. 2023;36(1):23-28.   Published online January 1, 2023
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.

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Electro-Thermal Annealing of 3D NAND Flash Memory Using Through-Silicon Via for Improved Heat Distribution
J Electr Electron Mater. 2023;36(1):23-28.   Published online January 1, 2023
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