Hafnium oxide (HfO2) was very advantageous for substitute material of gate on existing transistor. HfO2 has been widely studied due to high contact with polysilicon and thermal stability and also, it is easily etched by using HF solution. In this study, HfO2 and thermal oxide films were etched by wet etch method using chemical etchant. Etch rate of HfO2 and thermal oxide was linearly increased with increasing concentration of HF and temperature but etch rate of HfO2 was higher than thermal oxide due to H+, F-, and HF2- ions at below 0.5% concentration of HF. And also, etch selectivity was improved by adding Hydrazine as additive.
Recently, amorphous oxide semiconductors (AOSs) based thin-film transistors (TFTs) have received considerable attention for application in the next generation displays industry. The research trends of AOSs based TFTs investigation have focused on the high device performance. The electrical properties of the TFTs are influenced by trap density. In particular, the threshold voltage (Vth) and subthreshold swing (SS) essentially depend on the semiconductor/gate-insulator interface trap. In this article, we investigated the effects of Ar plasma-treated SiO2 insulator on the interfacial property and the device performances of amorphous indium gallium zinc oxide (a-IGZO) TFTs. We report on the improvement in interfacial characteristics between a-IGZO channel layer and gate insulator depending on Ar power in plasma process, since the change of treatment power could result in different plasma damage on the interface.
Thin-film transistors(TFTs) with magnesium zinc tin oxide(MZTO) channel layer are fabricated by solution-process. The threshold voltage (Vth) shifted toward positive directly with increasing Mg contents in MZTO system. Because the Mg has a lower standard electrode potential (SEP) than Sn, Zn, thus degenerate the oxygen vacancy (VO). As a result, the Mg act as carrier suppressor and oxygen binder in the MZTO as well as a Vth controller.
In semiconductor wafer fabrication, etching is one of the most critical processes, by which a material layer is selectively removed. Because of difficulty to correct a mistake caused by over etching, it is critical that etch should be performed correctly. This paper proposes a new approach for etch endpoint detection of small open area wafers. The traditional endpoint detection technique uses a few manually selected wavelengths, which are adequate for large open areas. As the integrated circuit devices continue to shrink in geometry and increase in device density, detecting the endpoint for small open areas presents a serious challenge to process engineers. In this work, a high-resolution optical emission spectroscopy (OES) sensor is used to provide the necessary sensitivity for detecting subtle endpoint signal. Partial Least Squares (PLS) method is used to analyze the OES data which reduces dimension of the data and increases gap between classes. Support Vector Machine (SVM) is employed to detect endpoint using the data after PLS. SVM classifies normal etching state and after endpoint state. Two data sets from OES are used in training PLS and SVM. The other data sets are used to test the performance of the model. The results show that the trained PLS and SVM hybrid algorithm model detects endpoint accurately.
In this study, we fabricate resistive switching random access memory (ReRAM) devices constructed with a Al/HfO2/ITO structure on glass substrates and investigate their memory characteristics. The hafnium oxide thin film used as a resistive switching layer is sputtered at room temperature in a sputtering system with a cooling unit. The Al/HfO2/ITO device exhibits bipolar resistive switching characteristics, and the ratio of the high resistance (HRS) to low resistance states (LRS) is more than 60. In addition, the resistance ratio maintains even after 10(4) seconds.
This paper was carried out design of 600 V GaN power MOSFET Modeling. We decided trench gate type one for design. we carried out device and process simulation with T-CAD tools. and then, we have extracted optimal device and process parameters for fabrication. we have analysis electrical characteristics after simulations. As results, we obtained 600 V breankdown voltage and 0.4 mΩcm2ultra low on resistance. At the same time, we carried out field ring simulation for obtaining high voltage.
In this work, we investigated to the etching characteristics of the TiN thin film in He/BCl3/Cl2 plasma. The etch rate was measured by the gas mixing ratio, the RF power, the DC bias voltage and the process pressure. The maximum etch rate in He/BCl3/Cl2 plasma was 59 nm/min. The etch rate increased as the RF power and the DC-bias voltage was increased. The chemical reaction on the surface of the etched the TiN thin films was investigated with X-ray photoelectron spectroscopy (XPS). The intensity of Ti 2p and N 1s peaks are varied during etching process. A new peak was appeared in He/BCl3/Cl2 plasma. The new peak was revealed Ti-Clx by Cl 2p peak of XPS wild scan spectra analysis.
0.935BaTiO3-0.065(Bi0.5Na0.5)TiO3+xmol%MnO2 (BBNTM-x) ceramics with 0≤x≤0.05 were fabricated with muffled sintering by a modified synthesis process. Their microstructure and enhanced positive temperature coefficient of resistivity (PTCR) characteristics were systematically investigated in order to obtain lead-free high TC PTCR thermistors. All specimens showed a perovskite structure with a tetragonal symmetry and no secondary phase was observed. Grain growth was achieved when the doped MnO2 was increased above 0.02 mol%. This is due to the effect of positive Mn ion doping as an acceptor compensating a Ba vacancy occurred by the higher donor dopant concentration of Bi3+ ion. Especially, enhanced PTCR characteristics of the extremely low ρRT of 99 Ω·㎝, PTCR jump of 5.1×10(3), α of 15.5%/℃ and high TC of 167℃ were achieved for the BBNTM-0.04 ceramics.
In this study, piezoelectric and dielectric properties of Lead-free 0.97[(K0.5Na0.5)(Nb0.97Sb0.03)O3] + 0.03[(Bi0.5K0.5)TiO3] (abbreviated as 0.97NKNS-0.03BKT)ceramics synthesized by conventional solid-state reaction process were investigated as a function of K5.4Cu1.3Ta10O29 addition. The results indicated that the K5.4Cu1.3Ta10O29 addition significantly improved the sinterability, grain growth and piezoelctric properties of 0.97NKNS-0.03BKT ceramics. The optimum values as planar piezoelectric coupling coefficient (kp= 0.355), piezoelectric constant (d33= 207 pC/N) and mechanical quality factor (Qm= 128) were obtained when 0.009KCT was added. The electromechanical coupling factor(kp )was slightly decreased according to the increasing temperature.
A novel design of a simple square-frame USM (ultrasonic motor) was proposed. The stator of the motor consists of a square-frame shape elastic body and four rectangular plate ceramics. The four ceramics were attached to inner surfaces of the square frame elastic body. The same phase voltages were applied to the ceramics on horizontal surfaces, and 90 degree phase difference voltage were applied to the ceramics on vertical surfaces. To find a model that generates elliptical motion at outside of the stator, the finite element analysis program ATILA was used. The analyzed results were compared to the experimental results. As result, the model EL10EH3ET0.5CL4 which generates the maximum elliptical displacement was chosen by analyzing the resonance mode according to changes in frequency.
Ga doped ZnO (GZO)/Cu bi-layer films were deposited with RF and DC magnetron sputtering on glass substrate and then the effect of post deposition annealing temperature on the structural, optical and electrical properties of the films was investigated. The post deposition annealing process was conducted for 30 minutes in gas pressure of 1×10-3 Torr and the annealing temperatures were 150 and 300℃. With increasing annealing temperature, GZO/Cu films showed an increment in the prefer orientation of ZnO (002) diffraction peak in the XRD pattern and the optical transmittance in a visible wave region was also increased, while the electrical sheet resistance was decreased. The GZO/Cu films annealed at 300℃ showed the highest optical transmittance of 70% and also showed the lowest electrical resistance of 85 Ω/□ in this study.
Recently, annual usage of energy is dramatically increasing because industrialization is going faster and more electricity is needed due to various electronic devices. This study focused on the performance characteristics of solar cell using the impedance technique. The experiment measured an impedance according to frequency`s from 2 mHz until 1 MHz. It could know that the impedance was decreased according to the frequency increases in solar cell. The imaginary part was changed from capacitance component to inductance component.
In this research, the electric characteristic of organic light-emitting diodes(OLEDs) was studied depending on thickness of amorphous fluoropolymer(Teflon-AF) which is the material of hole injection layer to improve electric characteristic of OLEDs. Sample composition was fabricated in double layer. The basic structure was fabricated by ITO/tris(8-hydroxyquinoline) aluminum (Alq3)/Al and the 2 layer was fabricated by ITO/2,2-Bistrifluoromethyl-4,5-Difluoro-1,3-Dioxole(Teflon-AF)/tris(8-hydro xyquinoline) aluminum (Alq3)/Al. The experiment was carried with variation of thickness of Teflon-AF at 1.0, 2.0, 2.5, 3.0 nm. The result showed when Teflon-AF thickness was 2.5 nm, the electric and optical characteristic were well performed. Moreover, when it was compared with Teflon-AF without materials, it was improved 15.1 times more on luminance, 12.7 times more on luminous efficiency and 12.1 times more on external quantum efficiency. Therefore, OLEDs element with optimum hole injection layer reduced energy barrier and driving voltage, and confirmed that it improved efficiency widely.
Cu(In1-x,Gax)Se2 thin films have been considered as an effective absorber material for high efficient solar cells. In this paper, the CIGS thin films with varied Ga content were prepared using a co-evaporation process of three stage. We carry out structure and electrical optical property on the thin film in varied Ga content. CIGS thin films have been characterized by X-ray diffraction(XRD), scanning electron microscopy(SEM), energy-dispersive spectroscopy(EDS), four-point probe measurement, and the Hall measurement. To optimize Ga contents, Ga/(In+Ga) ratio were changed from 0.13 to 0.72. At this time the carrier concentrations were varied from 1.22×10(11) cm-3 to 5.07×10(16) cm-3, and electrical resistivity were varied from 1.11×10(0) Ω-cm to 1.08×10(2) Ω-cm. A strong <220/204> orientation and a lager grain size were obtained at a Ga/(In+Ga) of 0.3. We were able to achieve conversion efficiency as high as 15.95% with a Ga/(In+Ga) of 0.3.
Znic sulfide (ZnS) thin films were deposited on glass substrates by radio frequency magnetron sputtering. The substrate temperature varied from room temperature (RT) to 500℃. The structural and optical properties of ZnS films were studied by X-ray diffraction (XRD), field emission scanning electron microscopy (FESEM), energy dispersive analysis of X-ray (EDAX) and UV-visible transmission spectra. The XRD analyses reveal that ZnS films have cubic structures with (111) preferential orientation, whereas the diffraction patterns sharpen with the increase in substrate temperatures. The FESEM images indicate that ZnS films deposited at 400℃ have nano-sized grains with a grain size of∼ 67 nm. The films exhibit relatively high transmittance of 80% in the visible region, with an energy band gap of 3.71 eV. One obvious result is that the energy band gap of the film increases with increasing the substrate temperatures.
Amorphous Si (a-Si) thin films of p+/p-/n+ were deposited on Si3N4/glass substrate by using a plasma enhanced chemical vapor deposition (PECVD) method. These films were annealed at various temperatures and for various times by using a rapid thermal process (RTP) equipment. This step was added before the main thermal treatment to make the nuclei in the a-Si thin film for reducing the process time of the crystallization. The main heat treatment for the crystallization was performed at the same condition of 600℃/18 h in conventional furnace. The open-circuit voltages (Voc) were remained about 450 mV up to the nucleation condition of 16min in the nucleation RTP temperature of 680℃. It meat that the process time for the crystallization step could be reduced by adding the nucleation step without decreasing the electrical property of the thin film Si for the solar cell application.