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Pulse Response Measurement Optimization of ReRAM-Based Neuromorphic Devices
Soon Joo Yoon, Yoon Kyeung Lee
J Electr Electron Mater 2026;39(3):258-266.
Published online May 1, 2026
DOI: https://doi.org/10.4313/JEEM.2026.39.3.4
The rapid advancement of large-scale language models and artificial intelligence technologies has highlighted the importance of data processing efficiency. This study outlines a measurement optimization method for high-speed pulse equipment to accurately analyze the operating dynamics of ReRAM, a core hardware component for simulating neural networks. An optimized evaluation methodology combining connection compensation and a dual-channel configuration was established to minimize measurement errors caused by parasitic resistance and capacitance during pulse measurements using the Keithley 4200A-SCS and 4225-PMU modules, and to address HRS/LRS measurement errors caused by mismatches between the measurement range and source limits. The proposed precision measurement guidelines can be applied to the evaluation of semiconductor devices that require pulse measurements, such as transistors and DRAM.
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Electrical Characterization of Nano SOI Wafer by Pseudo MOSFET
J Electr Electron Mater 2005;18(12):1075-1079.   Published online December 1, 2005
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Characterization of Ferroelectric Thin Film in Microwave Region
J Electr Electron Mater 2004;17(10):1061-1068.   Published online October 1, 2004
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