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"JFET"

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"JFET"

Analysis of the Electrical Characteristics of the β-Ga₂O₃ JFET by Using Nitrogen Doping
Hyoung Woo Kim, Jung Hun Kim, Jae Hwa Seo
J Electr Electron Mater 2025;38(2):207-212.   Published online March 1, 2025
DOI: https://doi.org/10.4313/JKEM.2025.38.2.12
In this study, we proposed β-Ga₂O₃ JFET using nitrogen doping and analyzed the electrical characteristics. In β-Ga₂O₃, nitrogen ions act as a deep acceptor and are used to implement the current blocking layer. By using this characteristic of the nitrogen ion, in the proposed JFET, nitrogen ions are used to obtain gate control and pinch off the channel of the JFET. The numerical TCAD simulation was performed to design and analyze the proposed JFET. The simulated forward and reverse characteristics of the proposed JFET were obtained as a function of JFET width and nitrogen doping concentration. The maximum breakdown voltage of 1.7 kV was obtained with the on-resistance of 16.7 mΩ·cm2 when the channel width was 1.5 μm and nitrogen doping concentration is 1×1018/cm3, respectively.
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Design and Optimization of Doping Concentration of the JFET Region of 4H-SiC VDMOSFETs
Hye-won Lee, Ye-jin Kim, Chang-jun Park, Ji-soo Choi, Geon-hee Lee, Sang-mo Koo
J Electr Electron Mater 2025;38(1):101-106.   Published online January 1, 2025
DOI: https://doi.org/10.4313/JKEM.2025.38.1.14
The 4H-SiC VDMOSFET demonstrates a high reverse breakdown voltage (BV) due to the JFET region but experiences relatively high on-resistance (Ron). A widely adopted method to reduce the Ron is to uniformly increase the doping concentration of the JFET region, which results in a trade-off that reduces the BV. This study proposes a method to optimize the segmentation of the JFET region by selectively increasing the doping concentration using ‘total doping’, ‘half-doping’, and ‘quarter-doping’. The optimized quarter segment with a specific doping concentration slightly reduces BV, but the sharp decrease in specific on-resistance (Ron,sp) results in a 105% improvement in the performance index, Baliga’s Figure of Merit (BFOM). This research suggests the potential for electrically superior designs by modifying the doping concentration in the JFET region of conventional VDMOSFET structures.
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Regular Paper : Properties of Reducing On-resistance for JFET Region in Power MOSFET by Double Ion Implantation
Ki Hyun Kim, Jeong Han Kim, Tae Su Park, Eun Sik Jung, Chang Heon Yang
J Electr Electron Mater 2015;28(4):213-217.   Published online April 1, 2015
Device model parameters are very important for accurate estimation of electrical performances in devices, integrated circuits and their systems. There are a large number of methods for extraction of model parameters in power MOSFETs. For high efficiency, design is important considerations of a power MOSFET with high-voltage applications in consumer electronics. Meanwhile, it was proposed that the efficiency of a MOSFET can be enhanced by conducting JFET region double implant to reduce the On-resistance of the transistor. This paper reports the effects of JFET region double implant on the electrical properties and the decreasing On-resistance of the MOSFET. Experimental results show that the 1st JFET region implant diffuse can enhance the On-resistance by decreasing the ion concentration due to the surface and reduce the On-resistance by implanting the 2nd Phosphorus to the surface JFET region.
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A Study on High-voltage Low-power Power MOSFET of Optimization for Industrial Motor Drive
Bum June Kim, Hun Suk Chung, Seong Jong Kim, Eun Sik Jung, Ey Goo Kang
J Electr Electron Mater 2012;25(3):170-175.   Published online March 1, 2012
Power MOSFET is develop in power savings, high efficiency, small size, high reliability, fast switching, low noise. Power MOSFET can be used high-speed switching transistors devices. Recently attention to the motor and the application of various technologies. Power MOSFET is devices the voltage-driven approach switching devices are design to handle on large power, power supplies, converters, motor controllers. In this paper, design the 600 V Planar type, and design the trench type for realization of low on-resistance. For both structures, by comparing and analyzing the results of the simulation and characterization.
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Electrical Properties of JFET using SiGe/Si/SiGe Channel Structure
B. G. Park, H. D. Yang, C. J. Choi, J. Y. Kim, K. H. Shim
J Electr Electron Mater 2009;22(11):905-909.   Published online November 1, 2009
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Comparison Study on Electrical Properties of SiGe JFET and Si JFET
B. G. Park, H. D. Yang, C. J. Choi, K. H. Shim
J Electr Electron Mater 2009;22(11):910-917.   Published online November 1, 2009
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A Simulation Study on the Structural Optimization of a 800 V 4H-SiC Power DMOSFET
Chang Yong Choi, Min Seok Kang, Wook Bahng, Sang Cheol Kim, Nam Kyun Kim, Sang Mo Koo
J Electr Electron Mater 2009;22(8):637-640.   Published online August 1, 2009
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A Study on the Electrical Characteristics in the Static Induction Transistor with Trench Oxide
J Electr Electron Mater 2005;18(1):6-11.   Published online January 1, 2005
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