This review examines the use of halide perovskite materials in electronic devices, highlighting their exceptional optoelectronic properties and the challenges associated with them. Despite their potential for high-performance devices, practical applications are limited by sensitivity to environmental factors such as moisture and oxygen, etc. We discuss advances in enhancing stability and operational reliability, featuring innovative synthesis methods and device engineering strategies that help mitigate degradation. Furthermore, we explore the integration of perovskites in applications such as field-effect transistors and LEDs, emphasizing their transformative potential. This review also outlines future research directions, stressing the need for ongoing improvements in material stability and device integration to fully realize the commercial potential of perovskites.

The deposition of indium zinc oxide (IZO) thin films was carried out on substrate at room temperature by RF magnetron sputtering. The effects of substrate temperature, RF power and deposition pressure were investigated with respect to physical and optical properties of films such as deposition rate, electrical properties, structure, and transmittance. As the RF power increases, the resistivity gradually decreases, and the transmittance slightly decreases. For the variation of deposition pressure, the resistivity greatly increases, and the transmittance is decreased with increasing deposition pressure. As a result, it was demonstrated that an IZO film with the resistivity of 3.89 × 10^-4 Ω·cm, the hole mobility of 51.28 ㎠/Vs, and the light transmittance of 86.89% in the visible spectrum at room temperature can be prepared without post-deposition annealing.

AGZO thin films were deposited on glass substrates using RF magnetron sputtering system under Ar flow rates, and their structural, electrical, and optical properties were analyzed systematically. As a result of the XRD pattern, the peak of the (002) (2θ≈33.7˚) orientation was observed, and it was found to have a hexagonal wurtzite structure. The sheet resistance of Ar 5 sccm was 3.073×10² Ω/sq and showed the best electrical properties because of the improvement of mobility due to the increase of the grain size and the variation of RMS roughness. In addition, the average transmittance was more than 90% for all samples, which demonstrated good optical properties. It is expected that the TCO characteristics can be improved by controlling Ar flow rates, and this will increase the efficiency of photoelectronic devices such as OLED and solar cells.

Field-effect transistors (FETs) are the key elements of conventional electronics; hence, have drawn a lot of research and commercial interests. In recent years, metal halide perovskite materials have achieved a remarkable efficiency of 29.15% in the field of photovoltaics, and have drawn the scientific community’s attention to promote their use in the field of optoelectronics, such as FETs and phototransistors. The MAPbI₃ (methylammonium lead iodide) perovskite TFT has achieved a record hole mobility of 21.41 ㎠/V-s in the year 2020. In this review, we will briefly discuss the physical structure of MAPbI₃ perovskite and the essential factors that stimulate these devices, together with the role of defects, the ion migration concept, and the implication of both dielectric and electrode materials on the device’s performance.

TFTs technologies with as high mobility as possible is essential for high-performance large displays. TFTs using nanocrystalline silicon thin films can achieve higher mobility. In this work, the change of the crystalline volume fraction at different hydrogen dilution ratios was investigated by depositing nc-Si:H thin films using PECVD. It was observed that increasing hydrogen dilution ratio increased not only the crystalline volume fraction but also the crystallite size. The thin films with a high crystalline volume fraction (55%) and a low defect density (10¹⁷ cm^-3·eV^-1) were used as top gate TFTs channel layer, leading to a high mobility (55 ㎠/V·s). We suggest that TFTs of high mobility to meet the need of display industries can be benefited by the formation of thin film with high crystalline volume fraction as well as low defect density as a channel layer.

In this research, we evaluated the electrical properties of polycrystalline-gallium-oxide (Ga₂O₃) thin films grown by mist-CVD. A 500~800 nm-thick Ga₂O₃ film was used as a channel in a fabricated bottom-gate MOSFET device. The phase stability of the β-phase Ga₂O₃ layer was enhanced by an annealing treatment. A Ti/Al metal stack served as source and drain electrodes. Maximum drain current (I_D) exceeded 1 mA at a drain voltage (VD) of 20 V. Electron mobility of the β-Ga₂O₃ channel was determined from maximum transconductance (gm), as approximately, 1.39 cm²/Vs. Reasonable device characteristics were demonstrated, from measurement of drain current-gate voltage, for mist-CVD-grown Ga₂O³ thin films.

Herein we studied the electrical and optical properties of indium tin oxide ITO/Ag/ITO multilayer thin films for application in transparent conducting electrodes. The ITO and Ag thin films were deposited onto soda lime glass (SLG) using radiofrequency and DC-sputtering methods, respectively. The as-synthesized ITO/Ag/ITO multilayer thin films were analyzed using 4-point probe, UV-Visible spectroscopy, and Hall measurement. We observed a rapid increase in electron concentration with increasing Ag thickness. However, electron mobility decreased with increasing Ag thickness. Finally, ITO/Ag/ITO multilayer thin films showed a characteristic low sheet resistance of 18 Ω/sq and high optical transmittance value (80%) with variation of Ag thickness (5~10 nm).

Zinc tin oxide transparent thin film transistors (ZTO TTFTs) were fabricated by using n`` Si wafers as gate electrodes. Indium (In), aluminum (Al), indium tin oxide (ITO), silver (Ag), and gold (Au) were employed for source and drain electrodes, and the mobility and the threshold voltage of ZTO TTFTs were observed as a function of electrode. The ZTO TTFTs adopting In as electrodes showed the highest mobility and the lowest threshold voltage. It was shown that Ag and Au are not suitable for the electrodes of ZTO TTFTs. As the results of this study, it is considered that the interface properties of electrode/ZTO are more influential in the properties of ZTO TTFTs than the conductivity of electrode.

Next-generation displays should be transparent and flexible as well as having high resolution and frame number. The main factor for active matrix organic light emitting diode and next-generation displays is the development of TFTs (thin-film transistors) with high mobility and large area uniformity. The TFTs used for transparent displays are mainly oxide TFT that has oxide semiconductor as channel layer. Zinc-oxide based substances such as indium-gallium-zinc-oxide has attracted attention in the display industry. In this paper, the mobility improvement of low cost oxide TFT is studied for fast operating next-generation displays by overcoming disadvantages of amorphous silicon TFT that has low mobility and poly silicon TFT that requires expensive equipment for complex process and doping process.

Transparent thin film transistors were fabricated on n+-Si wafers coated by Al2O3/SiO2. Zinctin oxide (ZTO) films deposited by rf magnetron sputtering were employed for active layers. The mobility(μs), threshold voltage (VT), and sub threshold swing (SS) dependances on ZTO thickness were analyzed. The VT decreased with increasing ZTO thickness. The μs raised from 5.1 cm2/Vsec to 27.0 cm2/Vsec byincreasing ZTO thickness from 7 nm to 12 nm, and then decreased with ZTO thickness above 12 nm. The SS was proportional to ZTO thickness.

Bottom-gate tin oxide (SnO2) thin film transistors (TFTs) were fabricated on N+ Si wafersused as gate electrodes. 60-nm-thick SnO2 thin films acting as active layers were sputtered onSiO2/Al2O3 films. The SiO2/Al2O3 films deposited on the Si wafers were employed for gate dielectrics. Inorder to increase the resistivity of the SnO2 thin films, oxygen mixed with argon was introduced into thechamber during the sputtering. The mobility of SnO2 TFTs was measured as a function of the flow ratioof oxygen to argon (O2/Ar). The mobility variation with O2/Ar was analyzed through studies oncrystallinity, oxygen binding state, optical properties. X-ray diffraction (XRD) and XPS (X-rayphotoelectron spectroscopy) were carried out to observe the crystallinity and oxygen binding state ofSnO2 films. The mobility decreased with increasing O2/Ar. It was found that the decrease of the mobilityis mainly due to the decrease in the polarizability of SnO2 films.

In this paper, we analyzed the effects of the number of TIPS-pentacene droplets and also the substrate temperature on the performance of OTFTs As the number of the droplets increased, the mobility increased and reached the perk value and then reduced at all temperatures. The peak mobility was 0.14 ± 0.03 cm²/V sec at 3 droplets and 41℃, 0.19 ± 0.02 cm²/V.sec at 4 droplets and 46℃,and 0.35 ± 0.10 cm²/V sec at 7 droplets and 51℃. The reason of existence of peak mobility can be found in matching the evaporation of solvent with the velocity of crystal formation. When two parameters were properly matched, the mobility produced the highest.

Transparent thin film transistors (TTFT) were fabricated on N+ Si wafers. SiO2, Si3N4/SiO2 and Al2O3/SiO2 grown on the wafers were used as gate insulators. The rf magnetron sputtered zinc tin oxide (ZTO) films were adopted as active layers. N+Si wafers were wet-oxidized to grow SiO2. Si3N4 and Al2O3 films were deposited on the SiO2 by plasma enhanced chemical vapor deposition (PECVD) and atomic layer deposition (ALD), respectively. The mobility, Ion/Ioff and subthreshold swing (SS) were obtained from the transfer characteristics of TTFTs. The properties of gate insulators were analyzed by comparing the characteristics of TTFTs. The property variation of the ZTO TTFTs with time were observed.

In this study, the influence of the intermolecular distance on the charge mobility in a pentacene thin-film was investigated. In order to increase the mobility which depends on the π-overlap between molecules, the intermolecular distance was shortened by compressive force along the conduction channel. Pentacene thin-film was fabricated on flexible substrates bent outward at different radii to stretch the gate dielectric surface and then the substrates were unbent, producing the compressive force to the film. The result showed that the mobility increased proportionally to the strain applied during the pentacen deposition and the molecular packing inside a grain was not optimal for the charge transport.

Transparent thin film transistors (TTFT) were fabricated using the rf magnetron sputtered ZnO-SnO2 films as active layers. A ceramic target whose Zn atomic ratio to Sn is 2:1 was employed for the deposition of ZnO-SnO2 films. To study the post-annealing effects on the properties of TTFT, ZnO-SnO2 films were annealed at 200℃ or 400℃ for 5 min before In deposition for source and drain electrodes. Oxygen was added into chamber during sputtering to raise the resistivity of ZnO-SnO2 films. The effects of oxygen addition on the properties of TTFT were also investigated. 100 nm Si3N4 film grown on 100 nm SiO2 film was used as gate dielectrics. The mobility, Ion/Ioff, interface state density etc. were obtained from the transfer characteristics of ZnO-SnO2 TTFTs.

In this paper, we compared and analyzed 3D silicon-oxide-nitride-oxide-silicon (SONOS) multi layer flash memory devices fabricated on nitride or oxide layer, respectively. The device fabricated on nitride layer has inferior electrical properties than that fabricated on oxide layer. However, the device on nitride layer has faster program/erase speed (P/E speed) than that on the oxide layer, although having inferior electrical performance. Afterwards, to find out the reason why the device on nitride has faster P/E speed, 1/f noise analysis of both devices is investigated. From gate bias dependance, both devices follow the mobility fluctuation model which results from the lattice scattering and defects in the channel layer. In addition, the device on nitride with better memory characteristics has higher normalized drain current noise power spectral density (S(ID)/I(D)2), which means that it has more traps and defects in the channel layer. The apparent hooge`s noise parameter (αapp) to represent the grain boundary trap density and the height of grain boundary potential barrier is considered. The device on nitride has higher αapp values, which can be explained due to more grain boundary traps. Therefore, the reason why the devices on nitride and oxide have a different P/E speed can be explained due to the trapping/de-trapping of free carriers into more grain boundary trap sites in channel layer.

Presented herein are the results of the study that was conducted on the electrical characteristics of organic field-effect transistors based on poly(3-hexylthiophene), particularly the thickness and annealing temperature of their active layer is varied. The changes in field-effect mobility and current on/off ratio were explored. It was observed that both increasing annealing temperature from 60℃ to 100℃ and various concentrations influence the trade-off relations between the mobility and current on/off ratio. The surface morphology of the 2-μm2 area with various thicknesses was scanned via atomic-forcemicroscopy(AFM) to verify the relationship between surface morphology, which is related to the thickness of the film, and device performance.

Soution-processed ZrInZnO (ZIZO) thin-film transistors (TFTs) with varying Zr content were fabricated. The ZIZO TFT (Zr=20 at. %/Zn) has an optimal performance with the saturation field effect mobility of 0.77 cm2/Vs, the threshold voltage (Vth) of 2.1 V, the on/off ratio of 4.95×10(6), and subthreshold swing (S.S) of 0.73 V/decade. Using this optimized ZIZO TFT, the positive and negative gate bias stress according to annealing temperature was also investigated. While the Vth shifts dramatically after 1,000 s of both gate bias stresses, variations in the S.S are negligible. It suggests that electrons or holes are temporarily trapped in the gate insulator, the semiconductor, or the interface between both layers.