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Bi계 ZnO 칩 바리스터의 저온소결과 전기적 특성

홍연우, 신효순, 여동훈, 김진호

Low Temperature Sintering and Electrical Properties of Bi-based ZnO Chip Varistor

Youn Woo Hong, Hyo Soon Shin, Dong Hun Yeo, Jin Ho Kim
J Electr Electron Mater 2011;24(11):876-881.
Published online: November 1, 2011
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The sintering, defect and grain boundary characteristics of Bi-based ZnO chip varistor (1,608 mm size) have been investigated to know the possibility of lowering a manufacturing price by using 100 % Ag inner-electrode. The samples were prepared by general multilayer chip varistor process and characterized by shrinkage, SEM, current-voltage (I-V), admittance spectroscopy (AS), impedance and modulus spectroscopy (IS & MS) measurement. There are no problems to make a chip varistor with 100% Ag inner-electrode in the sintering temperature range of 850∼900℃ for 1 h in air. A good varistor characteristics (Vn= 9.3∼15.4 V, a= 23∼24, IL= 1.0∼1.6 μA) were revealed but formed Zn(i)·· (0.209 eV) as dominant defect, and increased the distributional inhomogeneity and the temperature instability in grain boundary barriers.

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Low Temperature Sintering and Electrical Properties of Bi-based ZnO Chip Varistor
J Electr Electron Mater. 2011;24(11):876-881.   Published online November 1, 2011
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.

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Low Temperature Sintering and Electrical Properties of Bi-based ZnO Chip Varistor
J Electr Electron Mater. 2011;24(11):876-881.   Published online November 1, 2011
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