High pressure deuterium (HPD) annealing is an advancing technology for the fabrication of modern semiconductor devices. In this work, gate-enclosed FETs are fabricated on a silicon substrate as test vehicles. After a cycle for the HPD annealing, the device parameters such as threshold voltage (VTH), subthreshold swing (SS), on-state current (ION), off-state current (IOFF), and gate leakage (IG) were measured and compared depending on the HPD. The HPD annealing can passivate the dangling bonds at Si-SiO2 interfaces as well as eliminate the bulk trap in SiO2. It can be concluded that adding the HPD annealing as a fabrication process is very effective in improving device reliability, performance, and variability.
