Skip to main navigation Skip to main content
  • KIEEME

J Electr Electron Mater : Journal of Electrical and Electronic Materials

OPEN ACCESS
Search
Advanced Search
ABOUT
BROWSE ARTICLES
EDITORIAL POLICIES
FOR CONTRIBUTORS

Articles

Page Path

반도체 / Offset 구조를 갖는 n - 채널 다결정 실리콘 박막 트랜지스터의 I-V 분석

변문기, 이제혁, 임동규, 박태성, 이진민, 김영호

The Analysis of I-V characteristics on n-channel offset gated poly-Si TFT's

M . G . Byun, J . H . Lee, D . G . Lim, T . S . Park, J . M . Lee, Y . H . Kim
J Electr Electron Mater 1999;12(10):829-834.
Published online: October 1, 1999
  • 2 Views
  • 0 Download
  • 0 Crossref
  • 0 Scopus
next

Full Article

Download PDF Download PDF

Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.

Format:

Include:

The Analysis of I-V characteristics on n-channel offset gated poly-Si TFT's
J Electr Electron Mater. 1999;12(10):829-834.   Published online October 1, 1999
Download Citation

Download a citation file in RIS format that can be imported by all major citation management software, including EndNote, ProCite, RefWorks, and Reference Manager.
Format:
Include:
The Analysis of I-V characteristics on n-channel offset gated poly-Si TFT's
J Electr Electron Mater. 1999;12(10):829-834.   Published online October 1, 1999
Close

Related articles

ABOUT

BROWSE ARTICLES

EDITORIAL POLICIES

FOR CONTRIBUTORS

© The Korean Institute of Electrical and Electronic Materials Engineers.