Silicon carbide (SiC) MOSFETs provide superior performance compared to traditional silicon devices under hightemperature and high-power conditions, making them particularly valuable for power electronics applications requiring highfrequency switching and high-energy efficiency. As the electric vehicle (EV) market expands, these devices are commonly packaged into six-pack modules, which can show their different electrical characteristics between the bare-die device and the package due to packaging that improves heat dissipation and other properties. This study uses bare-die SiC MOSFETs to explore their intrinsic characteristics and evaluate their performance in a half-bridge configuration. A half-bridge circuit was constructed, and performance was assessed by varying driving frequencies (10 kHz and 50 kHz) and adjusting the duty cycle between 20% and 80%. Analysis revealed that, at a fixed switching frequency, the average output voltage and average output current are proportional to the duty cycle.

NTC thermistors are essential components widely used for temperature sensing in various electronic sensor applications. However, conventional NTC thermistor ceramics typically require high sintering temperatures above 1150℃, necessitating the use of high-cost noble metal electrodes such as palladium (Pd) or platinum (Pt), which increases the overall manufacturing cost. In this study, low-melting-point oxides were successfully introduced as sintering aids to reduce the sintering temperature of NiMnCoO₄-based semiconducting ceramics. As the additive content increased, the B constant and average grain size exhibited an increasing trend, while the sample containing 5 wt% additives showed the lowest room-temperature resistivity. Furthermore, samples sintered at 1000℃ demonstrated slightly higher room-temperature resistivity and B constant values compared to those sintered at 1150℃. These results confirm that the addition of low-melting-point oxides is effective in lowering the sintering temperature of NiMnCoO₄ ceramics, suggesting the potential for reducing production costs and improving design flexibility in thermistor fabrication.

The quench behavior of coated conductors (CCs) was simulated with a focus on the initial stage of quenches, and the current limiting behavior of superconducting fault current limiters (SFCLs) at DC faults was calculated. Since the fault current reaches the peak in several ms in DC lines due to capacitor discharge, it is necessary to understand the initial quench behavior well. Considered in the simulation are characteristics of CCs in the flux-flow state, current sharing, non-uniform critical current distribution in CCs, and heat transfer to surroundings. The simulation fit data well. Using the CC model developed in the simulation, the current limiting behavior of SFCLs made of CCs at DC faults was calculated. Critical current distribution and heat transfer were found to affect the current limiting behavior of SFCLs less at DC faults. The calculation will contribute to the effective design of SFCLs for applications in DC lines.

In parallel with the efforts to improve the device performance in modern integrated circuits, it is necessary to downscale their core components, field-effect transistors (FETs), generally gauged by their physical gate length. Upon such device scaling, the emergence of the short-channel effect impedes further scaling into the nanometer scale in the silicon VLSI (Very-Large-Scale-Integration) system. To address this issue, two-dimensional (2D) semiconductors, leveraging their atomically thin thickness and dangling-bond-free characteristics, are being highlighted as a material solution for future scaling technology without severe mobility degradation. Despite the expected ideal physical properties, 2D semiconductors have yet to realize their full potential owing to the limited development of integration technology. In this context, we survey and review the tailored van der Waals integration technologies for 2D FETs. In particular, we provide an in-depth study of both van der Waals integrated contact and dielectric methods along with an explanation of customized materials. In essence, this van der Waals integrationcentered approach will be a core strategy to implement the high-performance 2D transistors that meet the demand of FET miniaturization.

Post-metallization annealing (PMA) has been employed in silicon-based CMOS fabrication to enhance MOSFET reliability and performance. However, although deuterium annealing can reduce interface traps between the Si and SiO₂ gate dielectric, it remains insufficient to fully passivate these traps. In this context, a multiple PMA process, including additional hydrogen annealing, is proposed to further reduce dangling bonds. Silicon-based MOSFETs are fabricated to verify the proposed annealing process architecture. Electrical characterization of the threshold voltage (VTH), subthreshold swing (SS), on-state current (ION), and carrier mobility (μ_n) is conducted to investigate the impact of the multiple PMA. This study provides a guideline for PMA in MOSFET fabrication, with improvements in both performance and reliability.

In this study, we proposed β-Ga₂O₃ JFET using nitrogen doping and analyzed the electrical characteristics. In β-Ga₂O₃, nitrogen ions act as a deep acceptor and are used to implement the current blocking layer. By using this characteristic of the nitrogen ion, in the proposed JFET, nitrogen ions are used to obtain gate control and pinch off the channel of the JFET. The numerical TCAD simulation was performed to design and analyze the proposed JFET. The simulated forward and reverse characteristics of the proposed JFET were obtained as a function of JFET width and nitrogen doping concentration. The maximum breakdown voltage of 1.7 kV was obtained with the on-resistance of 16.7 mΩ·cm² when the channel width was 1.5 μm and nitrogen doping concentration is 1×1018/cm³, respectively.

Next-generation wide-bandgap semiconductors such as SiC, GaN, and Ga₂O₃ are being considered as potential replacements for current silicon-based power devices due to their high mobility, larger size, and production of high-quality wafers at a moderate cost. In this study, we investigate the gradual modulation of chemical composition in multi-stacked metal oxide semiconductor thin films to enhance the performance and bias stability of thin-film transistors (TFTs). It demonstrates that adjusting the Ga ratio in the indium gallium oxide (IGO) semiconductor allows for precise control over the threshold voltage and enhances device stability. Moreover, employing multiple deposition techniques addresses the inherent limitations of solution-processed amorphous oxide semiconductor TFTs by mitigating porosity induced by solvent evaporation. It is anticipated that solution-processed indium gallium oxide (IGO) semiconductors, with a Ga ratio exceeding 50%, can be utilized in the production of oxide semiconductors with wide band gaps. These materials hold promise for power electronic applications necessitating high voltage and current capabilities.

Oxide semiconductor gas sensors are widely used for detecting toxic, explosive, and flammable gases due to their simple structure, cost-effectiveness, and potential integration into compact devices. However, their reliable gas detection is hindered by a longstanding issue known as humidity dependence, wherein the sensor resistance and gas response change significantly in the presence of moisture. This problem has persisted since the inception of oxide semiconductor gas sensors in the 1960s. This paper explores the root causes of humidity dependence in oxide semiconductor gas sensors and presents strategies to address this challenge. Mitigation strategies include functionalizing the gas-sensing material with noble metal/transition metal oxides and rare-earth/rare-earth oxides, as well as implementing a moisture barrier layer to prevent moisture diffusion into the gas-sensing film. Developing oxide semiconductor gas sensors immune to humidity dependence is expected to yield substantial socioeconomic benefits by enabling medical diagnosis, food quality assessment, environmental monitoring, and sensor network establishment.

With the recent development of emerging technologies, information acquisition and delivery between users has been actively conducted, and inorganic thin film transfer technology that effectively transfers various materials and devices is being studied to develop flexible electronic devices accordingly. This is aimed at innovative structural changes and functional improvement of electronic devices in the era of the Internet of Things (IoT). In particular, advanced technologies such as micro- LEDs are used to realize high-resolution flexible displays, and the possibility of heterogeneous integrated technologies can be presented by precisely transferring materials to substrates through various transfer process. This paper introduced physical, chemical, and self-assembly transfer methods based on inorganic thin film materials to implement heterogeneous integrated flexible semiconductor systems and introduces the results of application studies of semiconductor devices obtained through different transfer technologies. These studies are expected to bring about innovative changes in the field of smart devices, medical technology, and user interfaces in the future.

This study offers a comprehensive evaluation of the role and impact of advanced power semiconductors in solar module systems. Focusing on silicon carbide (SiC) and gallium nitride (GaN) materials, it highlights their superiority over traditional silicon in enhancing system efficiency and reliability. The research underscores the growing industry demand for high-performance semiconductors, driven by global sustainable energy goals. This shift is crucial for overcoming the limitations of conventional solar technology, paving the way for more efficient, economically viable, and environmentally sustainable solar energy solutions. The findings suggest significant potential for these advanced materials in shaping the future of solar power technology.

Carbon black with high purity and excellent conductivity is used as a conductive filler in the semiconductive compound for EHV (Extra High Voltage) power cables of 345 kV or higher. When carbon black and CNT (carbon nanotube) are applied together as a conductive filler of a semiconductive compound, stable electrical properties of the semiconductive compound can be maintained even though the amount of conductive filler is significantly reduced. In EHV power cables, since the semi-conductive layer is close to the conductor, stable electrical characteristics are required even under high-temperature conditions caused by heat generated from the conductor. In this study, the theoretical principle that a semiconductive compound applied with carbon black and CNT can maintain excellent electrical properties even under high-temperature conditions was studied. Basically, the conductive fillers dispersed in the matrix form an electrical network. The base polymer and the matrix of the composite, expands by heat under high temperature conditions. Because of this, the electrical network connected by the conductive fillers is weakened. In particular, since the conductive filler has high thermal conductivity, the semiconductive compound causes more thermal expansion. Therefore, the effect of CNT as a conductive filler on the thermal conductivity, thermal expansion coefficient, and volume resistivity of the semiconductive compound was studied. From this result, thermal expansion and composition of the electrical network under high temperature conditions are explained.

Recently, the global demands for high voltage power semiconductors are increasing across various industrial fields. The use of electric cars with high safety and convenience is becoming practical, and IGBT modules of 3.3 kV and 1.2 kA or higher are used for electric locomotives. Delicate design and advanced process technology are required, and research on the optimization of high-voltage IGBT parts is urgently needed in the industry. In this study, we attempted to design a simulation process through TCAD (technology computer-aid design) software to optimize the process conditions of the fielding process among the core unit processes for an especial high yield voltage. As well, the prior circuit technology design and a ring pattern with a large number of ring formation structures outside the wafer similar to the chip structure of other companies were constructed for 3.3 kV NPT-IGBT through a unit process demonstration experiment. The ring pattern was designed with 21 rings and the width of the ring was 6.6 μm. By changing the spacing between patterns from 17.4 μm to 35.4 μm, it was possible to optimize the spacing from 19.2 μm to 18.4 μm.

Underwater wireless communication is a challenging issue for realizing the smart aqua-farm and various marine activities for exploring the ocean and environmental monitoring. In comparison to acoustic and radio frequency technologies, the visible light communication is the most promising method to transmit data with a higher speed in complex underwater environments. To send data at a speedier rate, high-performance photodetectors are essentially required to receive blue and/or cyan-blue light that are transmitted from the light sources in a light-fidelity (Li-Fi) system. Here, we fabricated high-performance organic phototransistors (OPTs) based on P-type donor polymer (PTO2) and N-type acceptor small molecule (IT-4F) blend semiconductors. Bulk-heterojunction (BHJ) PTO2:IT-4F photo-active layer has a broad absorption spectrum in the range of 450~550 nm wavelength. Solution-processed OPTs showed a high photo-responsivity >1,000 mA/W, a large photo-sensitivity >10³, a fast response time, and reproducible light-On/Off switching characteristics even under a weak incident light. BHJ organic semiconductors absorbed photons and generated excitons, and efficiently dissociated to electron and hole carriers at the donor-acceptor interface. Printed and flexible OPTs can be widely used as Li-Fi receivers and image sensors for underwater communication and underwater internet of things (UIoTs).

Currently, semiconductor manufacturing industry heavily relies on a wide range of high global warming potential (GWP) gases, particularly during etching and cleaning processes, and their use and relevant carbon emissions are subject to global rules and regulations for achieving carbon neutrality by 2050. To replace high GWP gases in near future, dry etching using alternative low GWP gases is thus being under intense investigations. In this review, we report a current status and recent progress of the relevant research activities on dry etching processes using a low GWP gas. First, we review the concept of GWP itself and then introduce the difference between high and low GWP gases. Although most of the studies have concentrated on potentially replaceable additive gases such as C₄F₈, an ultimate solution with a lower GWP for main etching gases including CF₄ should be developed; therefore, we provide our own perspective in this regard. Finally, we summarize the advanced dry etch process research with low GWP gases and list up several issues to be considered in future research.

Defects in solids play a vital role on thermoelectric properties through the direct impacts of electronic band structure and electron/phonon transports, which can improve the electronic and thermal properties of a given thermoelectric semiconductor. Defects in semiconductors can be divided into four different types depending on their geometric dimensions, and thus understanding the effects on thermoelectric properties of each type is of a vital importance. This paper reviews the recent advances in the various thermoelectric semiconductors through defect engineering focusing on the charge carrier and phonon behaviors. First, we clarify and summarize each type of defects in thermoelectric semiconductors. Then, we review the recent achievements in thermoelectric properties by applying defect engineering when introducing defects into semiconductor lattices. This paper ends with a brief discussion on the challenges and future directions of defect engineering in the thermoelectric field.

In this work, the effect of sputtering working pressure for the tellurium film and its thin-film transistor was investigated. The transfer characteristics of tellurium thin-film transistors were improved by increasing the working pressure during sputtering process. As increasing working pressure, physical and optical properties of Te films such as crystallinity, transmittance, and surface roughness were improved. Therefore, the improved transfer characteristics of Te thin-film transistors may originate from both improved interface properties between the silicon oxide gate dielectric layer and the tellurium active layer with an improved quality of Te film. In conclusion, the control of working pressure during sputtering would be important for obtaining highperformance tellurium-based thin film transistor.

Durability of superconductors used to fabricate superconducting power machines is important, since the machines need to operate stably. Quench properties of GBCO (GdBa₂Cu₃O₇) coated conductor tapes laminated with brass were measured and analyzed to investigate the durability of tapes under repeated short-circuit conditions. With short currents applied to the tapes repeatedly, the quench properties of tapes were measured, and bubbles generated during quenches were observed. The results showed that quench resistance and distribution were maintained after repeated quenches. They were maintained after repeated quenches at various applied voltages, which show durability of the tapes under repeated short-circuit conditions. The quench distribution was uniform throughout repeated quenches, which contributed to the durability of tapes.

The transfer characteristics of amorphous indium gallium zinc oxide thin film transistor (a-IGZO TFT) showed the distortion in the subthreshold region after gate bias stress, in addition to the parallel shift of threshold voltage. The capacitancevoltage (C-V) curve was also deformed from its initial shape after the gate bias stress. This study analyzes both the C-V and transfer curves plotted on the same gate voltage axis in order to investigate the mechanism driving the distortion in the transfer curve. It is deduced that an additional interfacial trap states at the bottom interface of a-IGZO are produced during gate bias stress, thereby they exhibit the back channel effect, which explains the origin of the distortion in the transfer curve and the deformation of C-V curve.

Non-volatile memory is approaching its fundamental limits with the Si3N4 storage layer, necessitating the use of alternative materials to achieve a higher programming/erasing speed, larger storage window, and better data retention at lower operating voltage. This limitation has restricted the development of the charge-trap memory, but can be addressed by using high-k dielectrics. The paper reviews the doping of nitrogen, titanium, and yttrium on high-k dielectrics as a storage layer by comparing MONOS devices with different storage layers. The results show that nitrogen doping increases the storage window of the Gd₂O₃ storage layer and improves its charge retention. Titanium doping can increase the charge capture rate of HfO₂ storage layer. Yttrium doping increases the storage window of the BaTiO₃ storage layer and improves its fatigue characteristics. Parameters such as the dielectric constant, leakage current, and speed of the memory device can be controlled by maintaining a suitable amount of external impurities in the device.

Inorganic-organic hybrid perovskite solar cells have demonstrated a significant achievement by reaching a certified power conversion efficiency of 25.2% in 2019 as compared to that of 3.8% in 2009. However, organic hole conductors such as PTAA and spiro-OMeTAD are known to be expensive and unstable when they are exposed to operational conditions. In this study, the inorganic hole conductor CuSCN was used to overcome such concerns. The influence of dipropyl sulfide (DPS) and diethyl sulfide (DES) as CuSCN deposition solvents on the underlying perovskite active layer was investigated. DES solvent was observed to be advantageous in terms of CuSCN solubility and mild for the perovskite layer, thereby resulting in a power conversion efficiency of 16.9%.

Relatively pure YBCO was first synthesized by heating a mixture of metal carbonates at temperatures between 1,000 and 1,300 K, resulting in the reaction: 4BaCO₃＋Y₂(CO₃)₃＋6CuCO₃＋(1/2_-x)O₂ → 2YBa₂Cu₃O_7-x＋1/3CO₂. Modern syntheses of YBCO use the corresponding oxides and nitrates. The superconducting properties of YBa₂Cu₃O_7-x are sensitive to the value of x, i.e., its oxygen content. Only those materials with 0≤x≤0.65 are superconducting below Tc, and when x ~ 0.07, the material superconducts at the highest temperature, i.e., 95 K, or in the highest magnetic fields, i.e., 120 T and 250 T when B is perpendicular and parallel to the CuO₂ planes, respectively. In addition to being sensitive to the stoichiometry of oxygen, the properties of YBCO are influenced by the crystallization methods applied. YBCO is a crystalline material, and the best superconductive properties are obtained when crystal grain boundaries are aligned by careful control of annealing and quenching temperature rates. However, these alternative methods still require careful sintering to produce a quality product. New possibilities have arisen since the discovery of trifluoroacetic acid, a source of fluorine that prevents the formation of undesired barium carbonate (BaCO₃). This route lowers the temperature necessary to obtain the correct phase at around 700℃. This, together with the lack of dependence on vacuum, makes this method a very promising way to achieve a scalable YBCO bulk.

Developing a thin-film transistor with characteristics such as a large area, high mobility, and high reliability are key elements required for the next generation on displays. In this paper, we have investigated the research trends related to improving the reliability of oxide-semiconductor-based thin-film transistors, which are the primary focus of study in the field of optical displays. It has been reported that thermal treatment in a high-pressure oxygen atmosphere reduces the threshold voltage shift from -7.1 V to -1.9 V under NBIS. Additionally, a device with a SiO₂/Si₃N₄ dual-structure has a lower threshold voltage (-0.82 V) under NBIS than a single-gate-insulator-based device (-11.6 V). The dual channel structure with different oxygen partial pressures was also confirmed to have a stable threshold voltage under NBIS. These can be considered for further study to improve the NBIS problem.

We investigated the electrical characteristics of amorphous silicon-zinc-tin-oxide (a-SZTO) thin films deposited by RF-magnetron sputtering at room temperature depending on the deposition time. We fabricated a thin film transistor (TFT) with a bottom gate structure and various channel thicknesses. With increasing channel thickness, the threshold voltage shifted negatively from -0.44 V to -2.18 V, the on current (I_on) and field effect mobility (μFE) increased because of increasing carrier concentration. The a-SZTO film was fabricated and analyzed in terms of the contact resistance and channel resistance. In this study, the transmission line method (TLM) was adopted and investigated. With increasing channel thickness, the contact resistance and sheet resistance both decreased.

Because of the rapidly changing environment and high uncertainties, the semiconductor industry is in need of appropriate forecasting technology. In particular, both the cost and time in the test process are increasing because the process becomes complicated and there are more factors to consider. In this paper, we propose a prediction model that predicts a final “good” or “bad” on the basis of preconditioning test data generated in the semiconductor test process. The proposed prediction model solves the classification and regression problems that are often dealt with in the semiconductor process and constructs a reliable prediction model. We also implemented a prediction model through various machine learning algorithms. We compared the performance of the prediction models constructed through each algorithm. Actual data of the semiconductor test process was used for accurate prediction model construction and effective test verification.

This research introduces the sputtered IZO thin film transistor (TFT) with solution-processed Al₂O₃ diffusion layer. IZO is one of the most commonly used amorphous oxide semiconductor (AOS) TFT. However, most AOS TFTs have many defects that degrade performance. Especially oxygen vacancy in the active layer. In previous research, aluminum was used as a carrier suppressor by binding the oxygen vacancy and making a strong bond with oxygen atoms. In this paper, we use a solution-processed Al₂O₃ diffusion layer to fabricate stable IZO TFTs. A double-layer solution-processed Al2O3-sputtered IZO TFT showed better performance and stability, compared to normal sputtered IZO TFT.

This aim of this study was to develop a process for creating bulk single-crystal YBaCuO superconductors in a high magnetic field. To support the bulk unidirectional growth of YBa₂Cu₃O_7-y, SmBa₂Cu₃O_7-y seeds were planted inside YBaCuO composites and samples were produced by melting, enabling the growth of two YBaCuO superconductors. Due to the magnetism generated inside the superconductor of the upper sample, the magnetization inside the superconducting single crystals was evenly distributed, the sharpness of the induced magnetic force was improved, and the superconducting magnetization were significantly improved. This approach is widely applicable for the production of superconducting wires and current leads used for DC power breakers.

Ultraviolet (UV) photodetectors are used in various industries and fields of research, including optical communication, flame sensing, missile plume detection, astronomical studies, biological sensors, and environmental research. However, general UV detectors that employ Schottky junction diodes and p^-n junctions have high fabrication cost and low quantum efficiency. In this study, we investigated the characteristics of materials used to manufacture UV photodetectors in a low-cost solution process that requires easy fabrication of flexible substrates. We fabricated p-type NiO and n-type ZnO substrates with wide band gap by the sol^-gel method and compared the characteristics of substrates prepared under different spin-coating and heat-treatment conditions.

We investigated solution-processed indium-yttrium-oxide (IYO) TFTs using apoly (methyl methacrylate) (PMMA) passivation layer. The IYO semiconductor solution was prepared with 0.1 M indium nitrate hydrate and 0.1 M yttrium acetate dehydrate as precursor solutions. The solution-processed IYO TFTs showed good performance: field-effect mobility of 13.13 ㎠/Vs, a threshold voltage of 8.2 V, a subthreshold slope of 0.93 V/dec, and a current on-to-off ratio of 7.2 × 10⁶. Moreover, the PMMA passivation layers used to protectthe IYO active layer of the TFTs, did so without deteriorating their performance under ambient conditions; their operational stability and electrical properties also improved by decreasing leakage current.

We report on amorphous thin-film transistors (TFTs) with indium zinc oxide (IZO) channel layers that were fabricated via a solution process. We prepared the IZO semiconductor solution with 0.1 M indium nitrate hydrate and 0.1 M zinc acetate dehydrate as precursor solutions. The solution- processed IZO TFTs showed good performance: a field-effect mobility of 7.29 ㎠/Vs, a threshold voltage of 4.66 V, a subthreshold slope of 0.48 V/dec, and a current on-to-off ratio of 1.62×10⁵. To investigate the static response of our solution-processed IZO TFTs, simple resistor load-type inverters were fabricated by connecting a 2-MΩ resistor. Our IZOTFTbased N-MOS inverter performed well at operating voltage, and therefore, isa good candidate for advanced logic circuits and display backplane.

In this study, we fabricated a TFT gas sensor with ZnO nanorods grown by hydrothermal synthesis. The suggested devices were compared with the conventional ZnO film-type TFTs in terms of the gas-response properties and the electrical transfer characteristics. The ZnO seed layer is formed by atomic-layer deposition (ALD), and the precursors for the nanorods are zinc nitrate hexahydrate (Zn(NO₃)₂·6H₂O) and hexamethylenetetramine ((CH₂)6N₄). When 15 ppm of NO gas was supplied in a gas chamber at 150°C to analyze the sensing capability of the suggested devices, the sensitivity (S) was 4.5, showing that the nanorod-type devices respond sensitively to the external environment. These results can be explained by X-ray photoelectron spectroscopy (XPS) analysis, which showed that the oxygen deficiency of ZnO nanorods is higher than that of ZnO film, and confirms that the ZnO nanorod-type TFTs are advantageous for the fabrication of high-performance gas sensors.