Various process modifications have been used to minimize SiO₂ gate oxide aging in metal-oxide-semiconductor field-effect transistors (MOSFETs). In particular, post-metallization annealing (PMA) with a deuterium ambient can effectively eliminate both bulk traps and interface traps in the gate oxide. However, even with the use of PMA, it remains difficult to prevent high levels of radiation-induced gate oxide damage such as total ionizing dose (TID) during long-term missions. In this context, additional low-temperature heat treatment (LTHT) is proposed to recover from radiation-induced damage. Positive traps in the damaged gate oxide can be neutralized using LTHT, thereby prolonging device reliability in harsh radioactive environments.

This paper investigates the soundness of porcelain insulators associated with the acoustic emission (AE) technique. The AE technique is a popular non-destructive method that measures and analyzes the burst energy that occurs mainly when a crack occurs in a high-frequency region. Typical AE methods require continuous monitoring with frequent sensor calibration. However, in this study, the AE technique excites a porcelain insulator using only an impact hammer, and it applies a high-pass filter to the signal frequency range measured only in the AE sensor by comparing the AE and the acceleration sensors. Next, the extracted time-domain signal is analyzed for the damage assessment. In normal signals, the duration is about 2ms, the area of the envelope is about 1,000, and the number of counts is about 20. In the damage signal, the duration exceeds 5ms, the area of the envelope is about 2,000, and the number of counts exceeds 40. In addition, various characteristics in the time and frequency domain for normal and damage cases are analyzed using the short-time Fourier transform (STFT). Based on the results of the STFT analysis, the maximum energy of a normal specimen is less than 0.02, while in the case of the damage specimen, it exceeds 0.02. The extracted high-frequency components can present dynamic behavior of crack regions and eigenmodes of the isolated insulator parts, but the presence, size, and distribution of cracks can be predicted indirectly. In this regard, the characteristics of the surface crack region were derived in this study.

In this paper, we investigated the electrical properties of crystalline silicon solar cell fabricated with Ni/Cu/Ag plating. The laser process was used to ablate silicon nitride layer as well as to form the selective emitter. Phosphoric acid layer was spin-coated to prevent damage caused by laser and formed selective emitter during laser process. As a result, the contact resistance was decreased by lower sheet resistance in electrode region. Low sheet resistance was obtained by increasing laser current, but efficiency and open circuit voltage were decreased by damage on the wafer surface. KOH treatment was used to remove the laser damage on the silicon surface prior to metalization of the front electrode by Ni/Cu/Ag plating. Ni and Cu were plated for each 4 minutes and 16 minutes and very thin layer of Ag with 1 ㎛ thickness was plated onto Ni/Cu electrode for 30 seconds to prevent oxidation of the electrode. The silicon solar cells with KOH treatment showed the 0.2% improved efficiency compared to those without treatment.