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"Ion implantation"

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"Ion implantation"

A Study of Dopant Distribution in SiGe Using Ion Implantation and Thermal Annealing
Won-chae Jung
J Electr Electron Mater 2018;31(6):377-385.   Published online September 1, 2018
For the investigation of dopant profiles in implanted Si1-xGex, the implanted B and As profiles are measured using SIMS (secondary ion mass spectrometry). The fundamental ion-solid interactions of implantation in Si1-xGex are discussed and explained using SRIM, UT-marlowe, and T-dyn programs. The annealed simulation profiles are also analyzed and compared with experimental data. In comparison with the SIMS data, the boron simulation results show 8% deviations of Rp and 1.8% deviations of ΔRp owing to relatively small lattice strain and relaxation on the sample surface. In comparison with the SIMS data, the simulation results show 4.7% deviations of Rp and 8.1% deviations of ΔRp in the arsenic implanted Si0.2Ge0.8 layer and 8.5% deviations of Rp and 38% deviations of ΔRp in the Si0.5Ge0.5 layer. An analytical method for obtaining the dopant profile is proposed and also compared with experimental and simulation data herein. For the high-speed CMOSFET (complementary metal oxide semiconductor field effect transistor) and HBT (heterojunction bipolar transistor), the study of dopant profiles in the Si1-xGex layer becomes more important for accurate device scaling and fabrication technologies.
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Modeling and Simulation on Ion Implanted and Annealed Indium Distribution in Silicon Using Low Energy Bombardment
Won-chae Jung
J Electr Electron Mater 2016;29(12):750-758.   Published online December 1, 2016
For the channel doping of shallow junction and retrograde well formation in CMOS, indium can be implanted in silicon. The retrograde doping profiles can serve the needs of channel engineering in deep MOS devices for punch-through suppression and threshold voltage control. Indium is heavier element than B, BF2 and Ga ions. It also has low coefficient of diffusion at high temperatures. Indium ions can be cause the erode of wafer surface during the implantation process due to sputtering. For the ultra shallow junction, indium ions can be implanted for p-doping in silicon. UT-MARLOWE and SRIM as Monte carlo ion-implant models have been developed for indium implantation into single crystal and amorphous silicon, respectively. An analytical tool was used to carry out for the annealing process from the extracted simulation data. For the 1D (one-dimensional) and 2D (two-dimensional) diffused profiles, the analytical model is also developed a simulation program with C++ code. It is very useful to simulate the indium profiles in implanted and annealed silicon autonomously. The fundamental ion-solid interactions and sputtering effects of ion implantation are discussed and explained using SRIM and T-dyn programs. The exact control of indium doping profiles can be suggested as a future technology for the extreme shallow junction in the fabrication process of integrated circuits.
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Improvement of Gate Dielectric Characteristics in MOS Capacitor by Deuterium-ion Implantation Process
Young Ho Seo, Seung Woo Do, Yong Hyun Lee, Jae Sung Lee
J Electr Electron Mater 2011;24(8):609-615.   Published online August 1, 2011
This paper is studied for the improvement of the characteristics of gate oxide with 3-nm-thick gate oxide by deuterium ion implantation methode. Deuterium ions were implanted to account for the topography of the overlaying layers and placing the D peak at the top of gate oxide. A short anneal at forming gas to nitrogen was performed to remove the damage of D-implantation. We simulated the deuterium ion implantation to find the optimum condition by SRIM (stopping and range of ions in matter) tool. We got the optimum condition by the results of simulation. We compare the electrical characteristics of the optimum condition with others terms. We also analyzed the electrical characteristics to change the annealing conditions after deuterium ion implantation. The results of the analysis, the breakdown time of the gate oxide was prolonged in the optimum condition. And a variety of annealing, we realized the dielectric property that annealing is good at longer time. However, the high temperature is bad because of thermal stress.
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Reliability Analysis for Deuterium Incorporated Gate Oxide Film through Negative-bias Temperature Instability and Hot-carrier Injection
Jae Sung Lee
J Electr Electron Mater 2008;21(8):687-694.   Published online August 1, 2008
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Organic Insulation Materials : Optical Transmittance Property of Polycarbonate Film at UV Range by Ion Implantation
Jae Hyeong Lee, Chan Yeong Lee, Jae Geun Gil
J Electr Electron Mater 2003;16(12):1091-1096.   Published online December 1, 2003
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Other : Electrical Conductivity Properties of the Vacuum Forming Packing Materials by Ion Implantation
Jae Hyeong Lee, Chan Yeong Lee, Jae Geun Gil
J Electr Electron Mater 2003;16(11):1055-1061.   Published online November 1, 2003
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Stabilization of Modified Deceleration Mode for Improvement of Low-energy Ion implantation Process
Yong Jin Seo, Chang Jun Park, Sang Yong Kim
J Electr Electron Mater 2003;16(3):175-180.   Published online March 1, 2003
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