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"Nano-scale"

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"Nano-scale"

Improving the Thermal Stability of Ni-silicide using Ni-V on Boron Cluster Implanted Source/drain for Nano-scale CMOSFETs
J Electr Electron Mater 2007;20(6):487-490.   Published online June 1, 2007
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Fabrication of SOI FinFET Devices using Arsenic Solid-phase-diffusion
Won Ju Cho, Hyun Mo Koo, Woo Hyun Lee, Sang Mo Koo, Hong Bay Chung
J Electr Electron Mater 2007;20(5):394-398.   Published online May 1, 2007
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Thermal Stability Improvement of Ni-Silicide on the SOI Substrate Doped B11 for Nano-scale CMOSFET
J Electr Electron Mater 2006;19(11):1000-1004.   Published online November 1, 2006
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Fabrication and Characterization of 32×32 Silicon Cantilever Array using MEMS Process
J Electr Electron Mater 2006;19(10):894-900.   Published online October 1, 2006
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Fabrication and Characterization of Thermal Probe Array on SOI Substrates
J Electr Electron Mater 2005;18(11):990-995.   Published online November 1, 2005
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