This paper presents a Si-NWFET-based LC-VCO design that includes an SCA, a P-type Si-NWFET varactor, a 1.2 nH LC tank, and a bias network to linearize the varactor’s C-V characteristics, enabling a wide oscillation frequency tuning range. The circuit achieves a 24 GHz oscillation frequency with a low power consumption of 16.8 μW at a control voltage (V_ctrl) of 0.7 V. Phase noise simulations indicate an excellent -109.62 dBc/Hz at a 1 MHz offset, confirming its applicability for RFIC systems. Additionally, the proposed LC-VCO demonstrates stable performance in five major corner process analyses, ensuring robustness under extreme conditions. These results validate the durability of the design and highlight the potential of Si-NWFETbased LC-VCOs as a viable, low-power, highly integrated solution for RFIC applications. The findings underscore the suitability of Si-NWFET technology as a promising alternative to current FinFET and CMOS processes in advanced circuit design.

We design, develope and test a parallel active polymer pen lithography (PPL) device, which consists of individually addressable elastomeric probe tips. The PPL array chip is fabricated using soft lithography method with polydimethylsiloxane (PDMS) material. Individual probe can be pneumatically actuated via a computer controlled interface. We demonstrate parallel writing with 16 individually addressed pens, with each pen producing a different pattern in the same run. The largest proof-of-concept array fabricated is 4×4 with a spacing of 250 μm in both x and y axes.

Performance of organic light-emitting diodes incorporating microlens array was simulated using a Light Tools software. Use of microlens array can help the light to escape out of the device. We simulated a reference device that is consisted of reflection layer, emissive layer, and flat transparent substrate. And in this reference device, outcoupled efficiency of 22% was obtained. Several shapes of microlens were applied such as hemisphere, trapezoid, cone, and rectangular parallelepiped. The results showed the improvement of outcoupled efficiency of the device with microlens compared to that of the reference one. And from the analyses of the simulated data, the obtained appropriate shape of microlens is hemisphere, and the improvement of the device with hemispherical lens is 57% higher than that of the reference one.

FPN (fixed-pattern-noise) mainly comes from the device or pattern mismatches in pixel and color filter, pixel photodiode leakage in CMOS image sensor. In this paper, optical stack module related pixel FPN was investigated and the classification of pixel FPN contribution with the individual optical module process was presented. The methodology and procedure would be helpful in reducing the greater pixel FPN and distinguishing the complex FPN sources with respect to various noise factors.