In this study, the physical mechanism and diffusion effects in aluminium implanted silicon was investigated. For fabricating power semiconductor devices, an aluminum implantation can be used as an emitter and a long drift region in a power diode, transistor, and thyristor. Thermal treatment with O₂ gas exhibited to a remarkably deeper profile than inert gas with N₂ in the depth of junction structure. The redistribution of aluminum implanted through via thermal annealing exhibited oxidation-enhanced diffusion in comparison with inert gas atmosphere. To investigate doping distribution for implantation and diffusion experiments, spreading resistance and secondary ion mass spectrometer tools were used for the measurements. For the deep-junction structure of these experiments, aluminum implantation and diffusion exhibited a junction depth around 20 μm for the fabrication of power silicon devices.

For the investigation of dopant profiles in implanted Si_1-xGe_x, the implanted B and As profiles are measured using SIMS (secondary ion mass spectrometry). The fundamental ion-solid interactions of implantation in Si_1-xGe_x are discussed and explained using SRIM, UT-marlowe, and T-dyn programs. The annealed simulation profiles are also analyzed and compared with experimental data. In comparison with the SIMS data, the boron simulation results show 8% deviations of R_p and 1.8% deviations of ΔR_p owing to relatively small lattice strain and relaxation on the sample surface. In comparison with the SIMS data, the simulation results show 4.7% deviations of R_p and 8.1% deviations of ΔR_p in the arsenic implanted Si_0.2Ge_0.8 layer and 8.5% deviations of R_p and 38% deviations of ΔR_p in the Si_0.5Ge_0.5 layer. An analytical method for obtaining the dopant profile is proposed and also compared with experimental and simulation data herein. For the high-speed CMOSFET (complementary metal oxide semiconductor field effect transistor) and HBT (heterojunction bipolar transistor), the study of dopant profiles in the Si_1-xGe_x layer becomes more important for accurate device scaling and fabrication technologies.

For the channel doping of shallow junction and retrograde well formation in CMOS, indium can be implanted in silicon. The retrograde doping profiles can serve the needs of channel engineering in deep MOS devices for punch-through suppression and threshold voltage control. Indium is heavier element than B, BF2 and Ga ions. It also has low coefficient of diffusion at high temperatures. Indium ions can be cause the erode of wafer surface during the implantation process due to sputtering. For the ultra shallow junction, indium ions can be implanted for p-doping in silicon. UT-MARLOWE and SRIM as Monte carlo ion-implant models have been developed for indium implantation into single crystal and amorphous silicon, respectively. An analytical tool was used to carry out for the annealing process from the extracted simulation data. For the 1D (one-dimensional) and 2D (two-dimensional) diffused profiles, the analytical model is also developed a simulation program with C++ code. It is very useful to simulate the indium profiles in implanted and annealed silicon autonomously. The fundamental ion-solid interactions and sputtering effects of ion implantation are discussed and explained using SRIM and T-dyn programs. The exact control of indium doping profiles can be suggested as a future technology for the extreme shallow junction in the fabrication process of integrated circuits.

For the formation of N+ doping, the antimony ions are mainly used for the fabrication of a BJT (bipolar junction transistor), CMOS (complementary metal oxide semiconductor), FET (field effect transistor) and BiCMOS (bipolar and complementary metal oxide semiconductor) process integration. Antimony is a heavy element and has relatively a low diffusion coefficient in silicon. Therefore, antimony is preferred as a candidate of ultra shallow junction for n type doping instead of arsenic implantation. Three-dimensional (3D) profiles of antimony are also compared one another from different tilt angles and incident energies under same dimensional conditions. The diffusion effect of antimony showed ORD (oxygen retarded diffusion) after thermal oxidation process. The interfacial effect of a SiO2/Si is influenced antimony diffusion and showed segregation effects during the oxidation process. The surface sputtering effect of antimony must be considered due to its heavy mass in the case of low energy and high dose conditions. The range of antimony implanted in amorphous and crystalline silicon are compared each other and its data and profiles also showed and explained after thermal annealing under inert N2gas and dry oxidation.

For integrated complementary metal oxide semiconductor (CMOS) circuits, the lateral spread for two-dimensional (2-D) impurity distributions are very important for the analyzing the devices. The measured two-dimensional SEM data obtained using the chemical etching-method matched very well with the results of the Gauss model for boron implanted samples. But the profiles in boron implanted silicon were deviated from the Gauss model. The profiles in boron implanted silicon were shown a little bit steep profile in the deep region due to backscattering effect on the near surface from the bombardments of light boron ions. From the simulated 3-D data obtained using an analytical model, the 1-D and 2-D data were compared with the experimental data and could be verified the justification from the experimental data. The data of 3-D model were also shown good agreements with the experimental and the simulated data. It can be used in the 3-D chip design and the analysis of microelectro-mecanical system (MEMS) and special devices.

In this paper, we investigated the device performance on fluorine implantation, hot carrier reliability and RTS (random telegraph signal) noise characteristics of NMOSFETs. The capacitance of the fluorine implanted NMOSFET decreased due to the increase of the gate oxide thickness. RTS noise characteristics of the fluorine implated NMOSFET was improved approximately by 46% due to the decrease of trap density at Si/SiO2 interface. The improved gate oxide quality also results in the longer hot carrier life time.

This paper is studied for the improvement of the characteristics of gate oxide with 3-nm-thick gate oxide by deuterium ion implantation methode. Deuterium ions were implanted to account for the topography of the overlaying layers and placing the D peak at the top of gate oxide. A short anneal at forming gas to nitrogen was performed to remove the damage of D-implantation. We simulated the deuterium ion implantation to find the optimum condition by SRIM (stopping and range of ions in matter) tool. We got the optimum condition by the results of simulation. We compare the electrical characteristics of the optimum condition with others terms. We also analyzed the electrical characteristics to change the annealing conditions after deuterium ion implantation. The results of the analysis, the breakdown time of the gate oxide was prolonged in the optimum condition. And a variety of annealing, we realized the dielectric property that annealing is good at longer time. However, the high temperature is bad because of thermal stress.

Citations

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  Yong-Joon Jang, Jinho Jang
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